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?2012 fairchild semiconductor corporation 1 www.fairchildsemi.com november 2012 fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver fan7080_gf085 half bridge gate driver features ? automotive qualified to aec q100 ? floating channel designed for bootstrap operation up to + 600v ? tolerance to negative transient voltage on vs pin ? common mode dv/dt noise cancelling circuit. ? gate drive supply range from 5.5v to 20v ? under-voltage lockout ? cmos schmitt-triggered inputs with pull-down ? high side output in phase with input ? 3.3v, 5v and 15v logic compatible input ? matched propagation delay for both channels ? adjustable dead time ? 8-lead small outline package (so 8l nb) typical applications ? automotive dc-dc converters ? half and full bridge motor control applications ? for fairchild?s definition of ?green? eco status, please visit: http://www.fairchildsemi.com/c ompany/green/rohs_green.html description the fan7080_gf085 is a half-bridge gate drive ic with reset input and adjustable dead time cont rol. it is designed for high voltage and high speed driving of mosfet or igbt, which operate up to 600v. fairchild's high-voltage process and com - mon-mode noise cancellation te chnique pro vide stable opera - tion in the high side driver u nder high-dv/dt noise circumstances. an advanced level- shift circuit allows high-side gate driver operation up to vs=-5v (typical) at vbs=15v. logic input is compatible with standard cmos outputs. the uvlo cir - cuits for both channels prevent malfunction when vcc and vbs are lower than the specified threshold voltage. combined pin function for dead time adjustment and reset shutdown enable this ic to be packaged in a space saving so 8l nb package. minimum source and sink current capability of output driver is 250ma and 500ma respectively, which is suitable for automo - tive dc-dc converters and half and full bridge motor control applications. so 8l nb ordering information device package operating te mp. fan7080m_gf085 so 8l nb -40 ? c ~ 125 ? c fan7080mx_gf085 so 8l nb -40 ? c ~ 125 ? c x : tape & reel type
?2012 fairchild semiconductor corporation 2 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver block diagrams deadtime control delay pulse generator pulse filter uvlo r r s q uvlo vcc com lo vb ho vs in sd/dt 500k 500k vreg vcc vcc vreg pin assignments 1 2 3 4 5 6 7 8 vcc in sd/dt com lo vs ho vb pin definitions pin number pin name i/o pin function description 1 vcc p driver supply voltage 2 in i logic input for high and low side gate drive output 3 sd /dt i shut down input and dead time setting 4 com p ground 5 lo a low side gate drive output for mosfet gate connection 6 vs a high side floating offset fo r mosfet source connection 7 ho a high side drive output for mosfet gate connection 8 vb p driver output stage supply
?2012 fairchild semiconductor corporation 3 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage parameters are abso - lute voltages referenced to com. parameter symbol min. max. unit high side floating supply offset voltage v s v b -25 v b +0.3 v high side floating supply voltage v b -0.3 625 v high side floating output voltage v ho vs-0.3 v b +0.3 v low side output voltage v lo -0.3 v cc + 0.3 v supply voltage v cc -0.3 25 v input voltage for i n vin -0.3 v cc +0.3 v input injection current. full function, no latch up;( guaranteed by design). test at 10v and 17v on eng.samples i in - +1 ma power dissipation pd (1) 0.625 w thermal resistance, junction to ambient rthja (1) 200 ? c/w electrostatic discharge voltage (human body model) v esd 1k v charge device model v cdm 500 v junction temperature tj 150 ? c storage temperature t s -55 150 ? c note: 1) the thermal resistance and power dissipation rating are measured bellow conditions; jesd51-2: integrated circuit thermal test method envi r onmental conditions - natural convection(stillair) jesd51-3 : low effective thermal conductivity test board for leaded surface mount package recommended operat ing conditions for proper operation the device should be used within the recommended conditions. parameter symbol min. max. unit high side floating supply voltage(dc) transient:-10v@ 0.1 us vb (1) v s + 6 v s + 20 v high side floating supply offset voltage(dc) transient: -25v(max) @0.1us @vbs<25v v s -5 600 v high side floating output voltage v ho vs v b v low side output voltage v lo 0 v cc v allowable offset voltage slew rate (2) dv/dt - 50 v/ns supply voltage for logic part v cc 5.5 20 v logic input voltage v in 0 v cc v switching frequency (3) f s 200 khz ambient temperature t a -40 125 ? c note: 1) the vs offset is tested with all supplies biased at 15v differential. 2) guaranteed by design. 3) when vdt= 1.2v.
?2012 fairchild semiconductor corporation 4 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver statics electrical characteristics unless otherwise specified, -40c <= ta <= 125 c, v cc = 15v, v bs = 15v, v s = 0v, c l = 1nf. parameter symbol conditions min. typ. max. unit vcc and vbs supply characteristics v cc and v bs supply under voltage positive going threshold v ccuv+ v bsuv+ - - 4.2 5.5 v v cc and v bs supply under voltage negative going threshold v ccuv - v bsuv- - 2.8 3.6 - v v cc and v bs supply under voltage hysteresis v ccuvh v bsuvh - 0.2 0.6 - v under voltage lockout response time tduvcc tduvbs vcc: 6v-->2.5v or 2.5v-->6v vbs: 6v-->2.5v or 2.5v-->6v 0.5 0.5 - - 20 20 us us offset supply leakage current i lk v b =v s =600v - 20 50 ua quiescent v bs supply current i qbs v in =0 or 5v, v sdt = 1.2v 20 75 150 ua quiescent vcc supply current i qcc v in =0 or 5, v sdt = 1.2v - 350 1000 ua input characteristics high logic level input voltage v ih 2.7 - - v low logic level input voltage v il - - 0.8 v high logic level input bias current for in i in+ v in =5v - 10 50 ua low logic level input bias current for in ii n- v in =0v - 0 2 ua vsdt dead time setting range v dt 1.2 - 5 v vsdt shutdown threshold voltage v sd - 0.8 1.2 v high logic level resistance for sd /dt r sdt v sdt =5v 100 500 1100 k ? low logic level input bias current for sd /dt isdt- v sdt =0v - 1 2 ua output characteristics high level output voltage, v cc -vh o v oh(ho) i o =0 - - 0.1 v low level output voltage, v ho v ol(ho) i o =0 - - 0.1 v output high short circuit pulse current i o+(ho) 250 300 - ma output low short circuit pulse current i o-(ho) 500 600 - ma equivalent output resistance r op(ho) - - 60 ? r on(ho) - - 30 ? high level output voltage, v b -v lo v oh(lo) i o =0 - - 0.1 v low level output voltage, v lo v ol(lo) i o =0 - - 0.1 v output high short circuit pulse current i o+(lo) 250 - - ma output low short circuit pulse current i o-(lo) 500 - - ma equivalent output resistance r op(lo) - - 60 ? r on(lo) - - 30 ?
?2012 fairchild semiconductor corporation 5 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver dynamic electrical characteristics unless otherwise specified, -40c <= ta <= 125 c, v cc = 15v, v bs = 15v, v s = 0v, c l = 1nf. parameter symbol conditions min. typ. max. unit turn-on propagation delay ton v s =0v - 750 1500 ns turn-off propagation delay toff v s =0v - 130 250 ns turn -on rising time tr - - 40 150 ns turn -off falling time tf - - 25 400 ns dead time, ls turn-off to hs turn-on and hs turn-on to ls turn-off dt v in =0 or 5v@ vdt=1.2v v in =0 or 5v@ vdt=3.3v 250 1600 650 2100 1200 2600 ns dead time matching time mdt dt1 -dt2@ vdt=1.2v dt1 -dt2@ vdt=3.3v - 35 - 110 300 ns delay matching, hs and ls turn-on mton vdt=1.2v - 25 110 ns delay matching, hs and ls turn-off mtoff vdt=1.2v 15 60 ns shutdown propagation delay ts d - 180 330 ns switching frequency fs1 v cc =v bs =20v - - 200 khz fs2 v cc =v bs =5.5v - - 200 khz
?2012 fairchild semiconductor corporation 6 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver typical application circuit up to 600v to load vcc in shutdown /dead time 1 2 3 4 5 6 7 8 vcc in sd/dt com lo vs ho vb r1 r2 vdt vdt = vdd*r2 / (r1+r2). vdd is output voltage of microcontroller. the operating range that allows a vdt range of 1.2~3.3v. when pulled lower than v dt [typ. 0.5v] the device is shutdown. care must be taken to avoid voltage spikes below the shutdown threshold on pin 3 that can cause undesired shut down of the ic. for this reason the connection of the components between pin 3 and ground has to be as short as possible. and a capacitor (typ 0.02uf )between pin3 and com can prevent this spike. this pin can not be left floating for the same reason.
?2012 fairchild semiconductor corporation 7 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver typical waveforms 1.0 1.5 2.0 2.5 3.0 3.5 0 500 1000 1500 2000 2500 3000 typ. dead time(ns) vdt, deadtime voltage(v) max. ho lo sd/dt in in(lo) in(ho) lo ho t on t r t off t f 50% 50% 90% 90% 10% 10% t sd 50% 90% ho lo sd 50% 50% 90% 10% 90% 10% dt1 dt2 in ho lo figure 1. input/output timing diagram figure 2. dead time vs v dt figure 4. shutdown waveform definitions figure 3. switching time waveform definitions figure 6. dead time waveform definitions figure 5. delay matching waveform definitions pwm(lo) pwm(ho) lo 50% 50% 10% 90% ho lo ho mton mtoff vcc=vbs=15v, -40 ? c < tj < 125 ? c
?2012 fairchild semiconductor corporation 8 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver performance graphs -50-25 0 255075100125 600 900 1200 1500 1800 typ. turn-on delay time(ns) temperature( o c) max. 10 12 14 16 18 20 500 600 700 800 900 1000 1100 1200 1300 1400 1500 typ. turn-on delay time(ns) v bias supply voltage(v) max. -50 -25 0 25 50 75 100 125 600 900 1200 1500 1800 typ. turn-on delay time(ns) temperature( o c) max. 10 12 14 16 18 20 500 600 700 800 900 1000 1100 1200 1300 1400 1500 typ. turn-on delay time(ns) v bias supply voltage(v) max. -50 -25 0 25 50 75 100 125 0 100 200 300 400 500 typ. turn-off delay time(ns) temperature( o c) max. 10 12 14 16 18 20 0 100 200 300 400 500 typ. turn-off delay time(ns) v bias supply voltage(v) max. figure 7a. turn-on delay time of ho vs vbs temperature figure 7b. turn-on delay time of ho vs vbs supply voltage figure 8a. turn-on delay time of lo vs temperature figure 8b. turn-on delay time vs of lo vbs supply voltage figure 9a. turn-off delay time of ho vs temperature figure 9b. turn-off delay time of ho vs vbs supply voltage vcc=vbs=15v, cl=1nf vcc=15v, cl=1nf, ta=25 ? c vcc=vbs=15v, cl=1nf vcc=15v, cl=1nf, ta=25 ? c vcc=vbs=15v, cl=1nf vcc=15v, cl=1nf, ta=25 ? c ( this performance graphs based on ambient temperature -40 ? c ~125 ?c)
10 12 14 16 18 20 0 50 100 150 200 250 typ. turn-on rise time(ns) v bias supply voltage(v) max. figure 10a. turn-off delay time of lo vs temperature figure 10b. turn-off delay time of lo vs vbs supply voltage figure 11a. turn-on rise time of ho vs temperature figur e 11b. turn-on rise time vs of ho vbs supply voltage figure 12a. turn-on rise time of lo vs temperature figure 12b. turn-on rise time of lo vs vbs supply voltage -50 -25 0 25 50 75 100 125 0 100 200 300 400 500 typ. turn-off delay time(ns) temperature( o c) max. 10 12 14 16 18 20 0 100 200 300 400 500 typ. turn-off delay time(ns) v bias supply voltage(v) max. -50 -25 0 25 50 75 100 125 0 50 100 150 200 typ. turn-on rise time(ns) temperature( o c) max. 10 12 14 16 18 20 0 50 100 150 200 250 typ. turn-on rise time(ns) v bias supply voltage(v) max. -50 -25 0 25 50 75 100 125 0 50 100 150 200 typ. turn-on rise time(ns) temperature( o c) max. vcc=vbs=15v, cl=1nf vcc=15v, cl=1nf, ta=25 ? c vcc=vbs=15v, cl=1nf vcc=15v, cl=1nf, ta=25 ? c vcc=vbs=15v, cl=1nf vcc=15v, cl=1nf, ta=25 ? c ?2012 fairchild semiconductor corporation 9 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver
figure 13a. turn-off fall time of ho vs temperature figure 13b. turn-off fall time of ho vs vbs supply voltage figure 14a. turn-off fall time of lo vs temperature figure 14b. turn-off fall time of lo vs bs supply voltage figure 15a. logic 0 input voltage vs temperature figure 15b. logic 1 input voltage vs temperature -50 -25 0 25 50 75 100 125 0 50 100 150 typ. turn-off fall time(ns) temperature( o c) max. 10 12 14 16 18 20 0 50 100 150 200 250 typ. turn-off fall time(ns) v bias supply voltage(v) max. -50 -25 0 25 50 75 100 125 0 50 100 150 typ. turn-off fall time(ns) temperature( o c) max. 10 12 14 16 18 20 0 50 100 150 200 250 typ. turn-off fall time(ns) v bias supply voltage(v) max. t \ w t y \ w y \ \ w ^ \ x w w x y \ wxyz[\ g g input voltage(v) temperature( o c) min. t \ w t y \ w y \ \ w ^ \ x w w x y \ wxyz[\ g g input voltage(v) temperature( o c) min. vcc=vbs=15v, cl=1nf vcc=15v, cl=1nf, ta=25 ? c vcc=vbs=15v, cl=1nf vcc=15v, cl=1nf, ta=25 ? c ?2012 fairchild semiconductor corporation 10 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver
10 12 14 16 18 20 0.0 0.1 0.2 0.3 0.4 0.5 high level output voltage (v) vbs supply voltage(v) max. figure 16a. high level output of ho vs temperature figur e 16b. high level output of ho vs vbs supply voltage figure 17a. high level output of lo vs temperature figure 17b. high level output of lo vs vcc supply voltage figure 18a. low level output of ho vs temperature figure 18b. low level output of ho vs vbs supply voltage -50 -25 0 25 50 75 100 125 0.0 0.1 0.2 0.3 0.4 0.5 high level output voltage (v) temperature( o c) max. -50 -25 0 25 50 75 100 125 0.0 0.1 0.2 0.3 0.4 0.5 high level output voltage (v) temperature( o c) max. 10 12 14 16 18 20 0.0 0.1 0.2 0.3 0.4 0.5 high level output voltage (v) v cc supply voltage(v) max. -50 -25 0 25 50 75 100 125 0.0 0.1 0.2 0.3 0.4 0.5 low level output voltage (v) temperature( o c) max. vcc=vbs=15v vcc=15v, ta=25 ? c vcc=vbs=15v vcc=15v, ta=25 ? c vcc=vbs=15v vcc=15v, ta=25 ? c 10 12 14 16 18 20 0.0 0.1 0.2 0.3 0.4 0.5 high level output voltage (v) vbs supply voltage(v) max. ?2012 fairchild semiconductor corporation 11 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver
figure 19a. low level output of lo vs temperature figure 19b. low level output of lo vs vcc supply voltage figure 20a. offset supply leakag e current vs temperature figur e 20b. offset supply leakage current vs vb boost voltage figure 21. vbs supply current vs temperature figure 22. vcc supply current vs temperature -50 -25 0 25 50 75 100 125 0.0 0.1 0.2 0.3 0.4 0.5 low level output voltage (v) temperature( o c) max. 10 12 14 16 18 20 0.0 0.1 0.2 0.3 0.4 0.5 low level output voltage (v) v cc supply voltage(v) max. -50-25 0 255075100125 0 40 80 120 160 200 offset supply leakage current(ua) temperature( o c) max. 0 100 200 300 400 500 600 0 100 200 300 400 500 offset supply leakage current (ua) v b boost voltage(v) max. -50 -25 0 25 50 75 100 125 0 50 100 150 200 typ. v bs supply cureent (ua) temperature ( o c) max. -50 -25 0 25 50 75 100 125 0 200 400 600 800 1000 1200 typ. v cc supply current (ua) temperature ( o c) max. vcc=vbs=15v vcc=15v, ta=25 ? c vb=vs=600v vcc=15v, ta=25 ? c vbs=15v vcc=15v ?2012 fairchild semiconductor corporation 12 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver
figure 23a. logic 1 input current vs temperature f igure 23b. logic 0 input current vs temperature figure 24a. vcc undervoltage threshold (+ ) vs temperature figure 24b. vcc undervoltage threshold(-) vs temperature figure 25a. vbs undervoltage threshold (+) vs temperature f igure 25b.vbs undervoltage threshold(-) vs temperature -50 -25 0 25 50 75 100 125 0 10 20 30 40 50 60 70 80 typ. max. g g logic "0" input current ( ua ) temperature ( o c) -50 -25 0 25 50 75 100 125 0 1 2 3 4 5 logic "1" input current( ? a) temperature( o c) max. -50 -25 0 25 50 75 100 125 2 3 4 5 6 7 8 max g g v cc supply voltage (v) temperature ( o c) typ -50 -25 0 25 50 75 100 125 2 3 4 5 6 typ g g v cc supply voltage (v) temperature ( o c) min -50 -25 0 25 50 75 100 125 2 3 4 5 6 7 8 typ g g v bs supply voltage (v) temperature ( o c) max -50 -25 0 25 50 75 100 125 2 3 4 5 6 min g g v bs supply voltage (v) temperature ( o c) typ vin=5v vin=5v ?2012 fairchild semiconductor corporation 13 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver
figure 26a. output source current of ho vs temperature f igure 26b. output sink current of ho vs temperature figure 27a. output source current of lo vs temperature figure 27b. output sink current of lo vs temperature figure 28. logic 0 input current of sd/dt vs temperature figure 29.shutdown threshold of vs temperature -50 -25 0 25 50 75 100 125 0 100 200 300 400 500 600 typ. output source current (ma) temperature ( o c) min. -50 -25 0 25 50 75 100 125 0 200 400 600 800 1000 typ . output sink cureent (ma) temperature ( o c) min . -50 -25 0 25 50 75 100 125 0 100 200 300 400 500 600 typ. output source current (ma) temperature ( o c) min. -50 -25 0 25 50 75 100 125 0 200 400 600 800 1000 typ . output sink cureent (ma) temperature ( o c) min . vcc=vbs=15v vcc=vbs=15v vcc=vbs=15v vcc=vbs=15v -50-25 0 255075100125 0 1 2 3 4 5 logic 0 input current of sd/dt (ua) temperature( o c) max. -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 g g shutdown threshold voltage (v) temperature ( o c) ?2012 fairchild semiconductor corporation 14 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver
figure 30. deadtime vs temperature figure 31. deadtime matching time vs temperature figure 32. turn-on delay matching vs temperature figure 33. turn_off delay matching vs temperature figure 34. shutdown propagation delay vs temperature figure35. maximum vs negtive offset of vs temperature -50-25 0 255075100125 300 600 900 1200 1500 typ. dead time(ns) temperature( o c) max. -50 -25 0 25 50 75 100 125 0 30 60 90 120 150 typ. dead time matching time (ns) temperature( o c) max. -50 -25 0 25 50 75 100 125 0 30 60 90 120 150 typ. delay matching of turn-on (ns) temperature( o c) max. -50 -25 0 25 50 75 100 125 0 20 40 60 80 typ. dead time matching time (ns) temperature( o c) max. -50 -25 0 25 50 75 100 125 0 50 100 150 200 250 300 350 400 450 500 typ. shutdown propagation delay (ns) temperature( o c) -50 -25 0 25 50 75 100 125 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 typ. vs offset supply voltage (v) temp( o c) vcc=vbs=15v, vdt=1.2v vcc=vbs=15v, vdt=1.2v vcc=vbs=15v, vdt=1.2v vcc=vbs=15v, vdt=1.2v vcc=vbs=15v ?2012 fairchild semiconductor corporation 15 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver
?2012 fairchild semiconductor corporation 16 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver package dimensions package drawings are provided as a service to customers considering fairchil d components. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild? s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . 8 0 see detail a notes: unless otherwise specified a) this package conforms to jedec ms-012, variation aa, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x175-8m. e) drawing filename: m08arev13 land pattern recommendation seating plane 0.10 c c gage plane x 45 detail a scale: 2:1 pin one indicator 4 8 1 c m ba 0.25 b 5 a 5.60 0.65 1.75 1.27 6.20 5.80 3.81 4.00 3.80 5.00 4.80 (0.33) 1.27 0.51 0.33 0.25 0.10 1.75 max 0.25 0.19 0.36 0.50 0.25 r0.10 r0.10 0.90 0.406 (1.04) option a - bevel edge option b - no bevel edge
?2012 fairchild semiconductor corporation 17 www.fairchildsemi.com fan7080_gf085 rev. 1.0.1 fan7080_gf085 half bridge gate driver trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended t o be an exhaustive list of all such trademarks. accupower auto-spm build it now coreplus corepower crossvolt ctl? current transfer logic? ecospark ? efficientmax? ezsw itch?* ?* deuxpeed? ? fairchild ? fairchild semiconductor ? fact quiet s eries? fact ? fas t ? fastvcore fetbench flashwriter ? * fps f-pfs frfet ? global power resource sm green fps green fps e-series g max ? gto intellimax is op la nar megabuck? microcoupler microfet micr op ak millerd rive? motionmax? motion-spm? optologic ? optoplanar ? ? pdp spm? power-spm powertrench ? powerxs? programmable active droop qfet ? qs quiet series rapidconfigure ? saving our world, 1mw /w/kw at a time? signalwise? smartmax? smart start spm ? stealth? superfet supersot -3 supersot -6 supersot -8 supremos? syncfet? sync-lock? ? * the power franchise ? tinyboost tinybuck tinycalc tinylogic ? tinyopto tinypower tinypwm tinywire trifault detect truecurrent * p serdes uhc ? ultra frfet unifet vcx visualmax xs? * trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life supp ort policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. anti-counterfeiting policy fairchild semiconductor corporation's anti-counterfeiting policy. fairchild's anti-counterfeiting policy is also stated on our external website, www. fairchildsemi.com, under sales support. counterfeiting of semiconductor parts is a growing problem in the industry. all manufacturers of semiconductor products are exp eriencing counterfeiting of their parts. customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard p erformance, failed applications, and increased cost of production and manufacturing delays. fairchild is taking st rong measures to protect ourselves and our cus tomers from the proliferation of counterfeit parts. fairchild strongly encourages customers to purchase fairchild parts either directly from fairchild or from a uthorized fairchild distributors who are listed by country on our web page cited above. products customers buy either from fairchild directly or from authorized fairchi ld distributors are genuine parts, have full traceability, meet fairchild's quality standards for handling and storage and provide access to fairchild's full rang e of up-to-date technical and product information. fairchild and our aut horized distributors will stand behind all warranties and will appropriately address any warr anty issues that may arise. fairchild will not provide any warranty coverage or other assistance for parts bought from unauthorized sources. fairchild is committed to com bat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. product status definitions definition of terms datasheet identification product status definition advance information formative / in design datasheet contains the design specifications for product development. specifications may change in any manner without notice. preliminary first production datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. no identification needed full production datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice to improve the design. obsolete not in production datasheet contains specifications on a product that is discontinued by fairchild semiconductor. the datasheet is for reference information only. rev . i43

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